1. Field of the Invention
The present invention relates to programmable logic devices. Furthermore, one embodiment of the present invention relates to semiconductor devices and the like including the programmable logic devices.
2. Description of the Related Art
A programmable logic device (PLD) includes a plurality of programmable logic elements and a plurality of programmable switch elements. The circuit structure and function of the PLD can be changed by changing the function of each programmable logic element or connection between programmable logic elements that is established with programmable switch elements by programming performed by a user after manufacture.
A multi-context PLD that stores a set of configuration data corresponding to a plurality of circuit structures and changes its circuit structure by selecting the set of configuration data to be used has been actively studied (for example, see Non-Patent Document 1). In particular, a fine-grained multi-context PLD has been actively studied because it has high flexibility in changing its circuit structure.
Since widely available configuration memories including static random access memories (SRAM) are volatile, in the case where the configuration memories are restarted after power supply is stopped, it is always necessary to store configuration data again in the configuration memories from external flash memories for storing the configuration data, i.e., to perform reconfiguration. Thus, in the case of portable devices and the like in which power supply is stopped frequently to reduce power consumption, it takes time to restart the configuration memories. To prevent such inconvenience, PLDs that include flash memories or magnetoresistive random access memories (MRAM) have been proposed in which configuration memories are made nonvolatile (for example, see Non-Patent Document 2 and Non-Patent Document 3).
In addition, it is difficult to increase the integration degree of configuration memories using SRAMs and power required for data retention is high. Thus, a report says that a coarse-grained multi-context PLD with a comparatively small number of configuration memories is favorable (for example, see Non-Patent Document 4).